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Silicon Labs /MGM240PB32VNN /CMU_S /EM01GRPCCLKCTRL

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Interpret as EM01GRPCCLKCTRL

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https://regviz.com/r/Silicon Labs/EFR32MG24A120F1536GM48/CMU_S/EM01GRPCCLKCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLKSEL

Description

No Description

Fields

CLKSEL

Clock Select

1 (HFRCODPLL): HFRCODPLL is clocking EM01GRPCCLK

2 (HFXO): HFXO is clocking EM01GRPCCLK

3 (FSRCO): FSRCO is clocking EM01GRPCCLK

4 (HFRCOEM23): HFRCOEM23 is clocking EM01GRPCCLK

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data